1.開發板
核心板,主芯片GW1NSR-LV4CQN48P,絲印文字“奧陶紀Octet,QQ群808770961”:
晶振:27MHz,22引腳
兩個按鍵:靠近中間,23引腳,按下為低電平;靠近外側,20引腳,按下為低電平
靠近USB接口右側6針為JTAG接口,引腳定義為左側絲印文字,在6針下側有4個撥碼開關,“on”位置對板載FPGA編程。
底板,絲印文字“Mini_Star Basic Experiment Board”:
8個LED:低電平亮
數碼管段碼:低電平亮
數碼管位碼:高電平選中
撥碼開關(SW):撥上高電平,撥下低電平
按鍵(KEY):不按高電平,按下低電平
2.IDE軟件
版本要求1.9.9及以上,下載地址:廣東高云半導體科技股份有限公司 (gowinsemi.com.cn)
3.示例
點燈程序,以FPGA內部集成210Mhz振蕩器作為時鐘源,利用OSC核:
module Gowin_OSC (Q);
output reg[7:0] Q;
reg [11:0] cnt;OSCZ osc_inst (.OSCOUT(oscout),.OSCEN(1'b1)
);defparam osc_inst.FREQ_DIV = 128; //210M經此分頻后約1.64M
defparam osc_inst.S_RATE = "SLOW";always@(posedge oscout )cnt<=cnt+1'b1;always@(posedge cnt[11] )Q<=Q+1'b1;
endmodule //Gowin_OSC
引腳約束
IO_LOC "Q[7]" 34;
IO_PORT "Q[7]" PULL_MODE=NONE DRIVE=8;
IO_LOC "Q[6]" 35;
IO_PORT "Q[6]" PULL_MODE=NONE DRIVE=8;
IO_LOC "Q[5]" 31;
IO_PORT "Q[5]" PULL_MODE=NONE DRIVE=8;
IO_LOC "Q[4]" 32;
IO_PORT "Q[4]" PULL_MODE=NONE DRIVE=8;
IO_LOC "Q[3]" 29;
IO_PORT "Q[3]" PULL_MODE=NONE DRIVE=8;
IO_LOC "Q[2]" 30;
IO_PORT "Q[2]" PULL_MODE=NONE DRIVE=8;
IO_LOC "Q[1]" 27;
IO_PORT "Q[1]" PULL_MODE=NONE DRIVE=8;
IO_LOC "Q[0]" 28;
IO_PORT "Q[0]" PULL_MODE=NONE DRIVE=8;
利用PLL實現的,時鐘為27M。
module Gowin_PLLVR (Q, clkin);
output reg[7:0] Q;
input clkin; //27Mwire lock_o;
wire clkoutp_o;
wire clkoutd_o;
wire clkoutd3_o;
wire gw_vcc;
wire gw_gnd;reg [11:0] cnt;assign gw_vcc = 1'b1;
assign gw_gnd = 1'b0;PLLVR pllvr_inst ( //5.4M輸出.CLKOUT(clkout),.LOCK(lock_o),.CLKOUTP(clkoutp_o),.CLKOUTD(clkoutd_o),.CLKOUTD3(clkoutd3_o),.RESET(gw_gnd),.RESET_P(gw_gnd),.CLKIN(clkin),.CLKFB(gw_gnd),.FBDSEL({gw_gnd,gw_gnd,gw_gnd,gw_gnd,gw_gnd,gw_gnd}),.IDSEL({gw_gnd,gw_gnd,gw_gnd,gw_gnd,gw_gnd,gw_gnd}),.ODSEL({gw_gnd,gw_gnd,gw_gnd,gw_gnd,gw_gnd,gw_gnd}),.PSDA({gw_gnd,gw_gnd,gw_gnd,gw_gnd}),.DUTYDA({gw_gnd,gw_gnd,gw_gnd,gw_gnd}),.FDLY({gw_gnd,gw_gnd,gw_gnd,gw_gnd}),.VREN(gw_vcc)
);defparam pllvr_inst.FCLKIN = "27";
defparam pllvr_inst.DYN_IDIV_SEL = "false";
defparam pllvr_inst.IDIV_SEL = 4;
defparam pllvr_inst.DYN_FBDIV_SEL = "false";
defparam pllvr_inst.FBDIV_SEL = 0;
defparam pllvr_inst.DYN_ODIV_SEL = "false";
defparam pllvr_inst.ODIV_SEL = 112;
defparam pllvr_inst.PSDA_SEL = "0000";
defparam pllvr_inst.DYN_DA_EN = "true";
defparam pllvr_inst.DUTYDA_SEL = "1000";
defparam pllvr_inst.CLKOUT_FT_DIR = 1'b1;
defparam pllvr_inst.CLKOUTP_FT_DIR = 1'b1;
defparam pllvr_inst.CLKOUT_DLY_STEP = 0;
defparam pllvr_inst.CLKOUTP_DLY_STEP = 0;
defparam pllvr_inst.CLKFB_SEL = "internal";
defparam pllvr_inst.CLKOUT_BYPASS = "false";
defparam pllvr_inst.CLKOUTP_BYPASS = "false";
defparam pllvr_inst.CLKOUTD_BYPASS = "false";
defparam pllvr_inst.DYN_SDIV_SEL = 2;
defparam pllvr_inst.CLKOUTD_SRC = "CLKOUT";
defparam pllvr_inst.CLKOUTD3_SRC = "CLKOUT";
defparam pllvr_inst.DEVICE = "GW1NSR-4C";always@(posedge clkout )cnt<=cnt+1'b1;always@(posedge cnt[11] )Q<=Q+1'b1;endmodule //Gowin_PLLVR
引腳約束在以上基礎上,增加clkin:
IO_LOC "clkin" 22;
IO_PORT "clkin" PULL_MODE=UP;