對下面的地址空間創建3級頁表
// level 1 table, 4 entries:
// 0000 0000 - 3FFF FFFF, 1GB block, DDR
// 4000 0000 - 7FFF FFFF, 1GB block, DDR
// 8000 0000 - BFFF FFFF, 1GB block, DDR
// C000 0000 - FFFF FFFF, point to level2 tabel
//
// level 2 table, 512 entries:
// C000 0000 - DFFF FFFF, 256 entries, 512MB DDR, 2MB block
// E000 0000 - EFFF FFFF, 128 ?entries, 256MB OSPI0 flash, 2MB block
// F000 0000 - F01F FFFF, 1 entries, resever , 2MB block, device
// F020 0000 - F03F FFFF, 1 entry, point to level 3_1
// F040 0000 - F05F FFFF, 1 entry, point to level 3_2
// F060 0000 - F07F FFFF, 1 entry, point to level 3_3
// F080 0000 - F09F FFFF, 1 entries, 2MB block, normal memory, RNE_MEM, 1.5M acture, SRAM
// F0A0 0000 - F0BF FFFF, 1 entries, 2MB block, device, RNE_CFG1
下面是創建過程與添加的注釋。
#include "v8_mmu.h".text.cfi_sections .debug_frame // put stack frame info into .debug_frame instead of .eh_frame.global setup_ttb.global ZeroBlock.global __ttb0_l1.global __ttb0_l2_ram.global __ttb0_l3_ram_1.global __ttb0_l3_ram_2.global __ttb0_l3_ram_3//----------------------------------------------------------------
// setup translation table
// level 1 table, 4 entries:
// 0000 0000 - 3FFF FFFF, 1GB block, DDR
// 4000 0000 - 7FFF FFFF, 1GB block, DDR
// 8000 0000 - BFFF FFFF, 1GB block, DDR
// C000 0000 - FFFF FFFF, point to level2 tabel
//
// level 2 table, 512 entries:
// C000 0000 - DFFF FFFF, 256 entries, 512MB DDR, 2MB block
// E000 0000 - EFFF FFFF, 128 entries, 256MB OSPI0 flash, 2MB block
// F000 0000 - F01F FFFF, 1 entries, resever , 2MB block, device
// F020 0000 - F03F FFFF, 1 entry, point to level 3_1
// F040 0000 - F05F FFFF, 1 entry, point to level 3_2
// F060 0000 - F07F FFFF, 1 entry, point to level 3_3
// F080 0000 - F09F FFFF, 1 entries, 2MB block, normal memory, RNE_MEM, 1.5M acture, SRAM
// F0A0 0000 - F0BF FFFF, 1 entries, 2MB block, device, RNE_CFG1
//----------------------------------------------------------------.type setup_ttb, "function".cfi_startproc
setup_ttb://// x21 = address of L1 tables// x22 = address of L2 tables// x23 = address of L3 tables F02// x24 = address of L3 tables F04// x25 = address of L3 tables F06//ldr x2, =0 // x2 = 0 (用于清零內存)ldr x3, =0 // x3 = 0 (同上)// 清零 L1 頁表 (__ttb0_l1) (L1 頁表(32 字節,4 個條目))ldr x21, =__ttb0_l1 // x21 = L1 頁表基地址mov x0, x21 // x0 = 當前操作地址mov x1, #(4 << 3) // x1 = 4個條目 * 8字節 = 32字節 (L1頁表大小)add x0, x0, x1 // x0 指向區域末尾 (預遞減清零準備)// can not call func ZeroBlock, not support nesting
loop_zero_0:subs x1, x1, #16 // 每次處理16字節 (2個條目),更新計數器stp x2, x3, [x0, #-16]! // 存儲雙零并遞減地址: [x0-16] = (0,0), x0-=16b.ne loop_zero_0 // 循環直到x1=0// 清零 L2 頁表 (__ttb0_l2_ram) (L2 頁表(4096 字節,512 條目))ldr x22, =__ttb0_l2_ram // x22 = L2 頁表基地址mov x1, #(512 << 3) // x1 = 512條目 * 8字節 = 4096字節 (標準2MB塊大小)mov x0, x22 // x0 = 當前操作地址add x0, x0, x1 // x0 指向區域末尾//循環使用 subs + b.ne 實現精確計數(當 x1 減至 0 時退出)
loop_zero_1:subs x1, x1, #16 // 每次16字節stp x2, x3, [x0, #-16]! // 存儲雙零并前移指針b.ne loop_zero_1 // 循環// 清零第一個 L3 頁表 (__ttb0_l3_ram_1) (三個 L3 頁表(各 4096 字節))ldr x23, =__ttb0_l3_ram_1 // x23 = L3 頁表1基地址mov x1, #(512 << 3) // 4096字節 (標準4KB頁表大小)mov x0, x23add x0, x0, x1 // 指向末尾
loop_zero_2:subs x1, x1, #16stp x2, x3, [x0, #-16]!b.ne loop_zero_2// 清零第二個 L3 頁表 (__ttb0_l3_ram_2)ldr x24, =__ttb0_l3_ram_2 // x24 = L3 頁表2基地址mov x1, #(512 << 3) // 4096字節mov x0, x24add x0, x0, x1 // 指向末尾
loop_zero_3:subs x1, x1, #16stp x2, x3, [x0, #-16]!b.ne loop_zero_3// 清零第三個 L3 頁表 (__ttb0_l3_ram_3)ldr x25, =__ttb0_l3_ram_3 // x25 = L3 頁表3基地址mov x1, #(512 << 3) // 4096字節mov x0, x25add x0, x0, x1 // 指向末尾
loop_zero_4:subs x1, x1, #16stp x2, x3, [x0, #-16]!b.ne loop_zero_4// 設置 L1 頁表項配置// 0000 0000 - 3FFF FFFF, 1GB block, DDR// 4000 0000 - 7FFF FFFF, 1GB block, DDR// 8000 0000 - BFFF FFFF, 1GB block, DDR// 3 1G block, write to l1 table//ldr x1, =3 // x1 = 3 (需要配置的頁表項數量)ldr x2, =0x40000000 // x2 = 1GB 地址增量 (每個 L1 條目映射 1GB 空間)// 構建 L1 塊描述符屬性值:// - 物理地址基址: 0x00000000// - 塊描述符類型 (TT_S1_ATTR_BLOCK) TT_S1_ATTR_BLOCK:使用塊描述符 (1GB/2MB 大頁)// - 內存屬性索引 1 (MATTR=1) 普通內存,適用于ddr// - 非安全狀態 (NS)// - 特權讀寫權限 (AP_RW_PL1)// - 內部可共享 (SH_INNER)// - 訪問標志 (AF)// - 非全局映射 (nG)ldr x3, =(0x00000000 | \TT_S1_ATTR_BLOCK | \(1 << TT_S1_ATTR_MATTR_LSB) | \TT_S1_ATTR_NS | \TT_S1_ATTR_AP_RW_PL1 | \TT_S1_ATTR_SH_INNER | \TT_S1_ATTR_AF | \TT_S1_ATTR_nG)mov x4, x21 // x4 = L1 頁表基址指針 (x21 來自前段代碼)#if 1 // enable after ddr ready
loop1:str x3, [x4], #8 // 存儲每次的x3描述符到 L1 頁表并后移指針add x3, x3, x2 // 物理地址增加 1GB (0x40000000)subs x1, x1, #1 // 遞減計數器bne loop1 // 循環直到 3 個條目配置完成
#else
loop1:add x4, x4, #8 // 僅移動指針 (不存儲)add x3, x3, x2 // 物理地址增加 1GBsubs x1, x1, #1bne loop1
#endif// 配置 L1 頁表中 C0000000-FFFFFFFF 區域的條目// C000 0000 - FFFF FFFF, point to level2 tabel, write to l1 tableorr x1, x22, #TT_S1_ATTR_PAGE // 將 L2 表基址(x22)與頁表描述符屬性組合。TT_S1_ATTR_PAGE:頁表描述符 (指向下級頁表)str x1, [x4] // 存儲到 L1 頁表 (指向 L2 頁表)// 配置 L2 頁表:DDR 區域 (C0000000-DFFFFFFF, 512MB)// level 2 table: C000 0000 - DFFF FFFF, 256 entries, 512MB DDR, 2MB blockldr x1, =256 // 256 個條目 (256 * 2MB = 512MB)ldr x2, =0x200000 // x2 = 2MB 地址增量 (塊大小)// 構建 DDR 區域的 L2 塊描述符:// - 物理地址基址: 0xC0000000// - 塊描述符類型// - 內存屬性索引 1 (普通內存)ldr x3, =(0xC0000000 | \TT_S1_ATTR_BLOCK | \(1 << TT_S1_ATTR_MATTR_LSB) | \TT_S1_ATTR_NS | \TT_S1_ATTR_AP_RW_PL1 | \TT_S1_ATTR_SH_INNER | \TT_S1_ATTR_AF | \TT_S1_ATTR_nG)mov x4, x22 // x4 = L2 頁表基址指針 (x22)
loop2_ddr:str x3, [x4], #8 // 存儲每次的x3到描述符到 L2 頁表并后移指針add x3, x3, x2 // 物理地址增加 2MBsubs x1, x1, #1 // 遞減計數器bne loop2_ddr // 循環配置 256 個條目// 配置 L2 頁表:OSPI0 Flash 區域 (E0000000-EFFFFFFF, 256MB)// level 2 table: E000 0000 - EFFF FFFF, 64 entries, 128MB OSPI0 flash, 2MB blockldr x1, =128 // 128 個條目 (128 * 2MB = 256MB)ldr x2, =0x200000 // 2MB 塊大小// 構建 OSPI Flash 的 L2 塊描述符:// - 物理地址基址: 0xE0000000// - 內存屬性索引TT_S1_ATTR_MATTR_LSB 2 (通常用于設備內存)//AP_RW_PL1:特權讀寫權限//SH_INNER:內部可共享//AF:訪問標志 (Access Flag)//nG:非全局映射ldr x3, =(0xE0000000 | \TT_S1_ATTR_BLOCK | \(2 << TT_S1_ATTR_MATTR_LSB) | \TT_S1_ATTR_NS | \TT_S1_ATTR_AP_RW_PL1 | \TT_S1_ATTR_SH_INNER | \TT_S1_ATTR_AF | \TT_S1_ATTR_nG)
loop2_ospi0:str x3, [x4], #8 // 繼續在 L2 頁表存儲 (緊接 DDR 區域之后)add x3, x3, x2 // 物理地址增加 2MBsubs x1, x1, #1 // 遞減計數器bne loop2_ospi0 // 循環配置 128 個條目// F0800000-F09FFFFF 區域:2MB 塊映射 (普通內存)// F000 0000 - F01F FFFF, resever, no need to set this block// F080 0000 - F09F FFFF, 1 entries, 2MB block, normal memory, RNE_MEM, 1.5M acture, SRAM// 物理地址 + 屬性ldr x1, =(0xF0800000 | \TT_S1_ATTR_BLOCK | \(1 << TT_S1_ATTR_MATTR_LSB) | \TT_S1_ATTR_NS | \TT_S1_ATTR_AP_RW_PL1 | \TT_S1_ATTR_SH_INNER | \TT_S1_ATTR_AF | \TT_S1_ATTR_nG)ldr x2, =0xF0800000 // 目標虛擬地址ubfx x3, x2, #21, #9 // 提取 L2 索引 (位[29:21]) ?str x1, [x22, x3, lsl #3] // 寫入 L2 頁表 (x22) ?// F0A00000-F0BFFFFF 區域:2MB 塊映射 (設備內存)// F0A0 0000 - F0BF FFFF, 1 entries, 2MB block, device, RNE_CFG1// 物理地址 + 屬性ldr x1, =(0xF0A00000 | \TT_S1_ATTR_BLOCK | \(2 << TT_S1_ATTR_MATTR_LSB) | \TT_S1_ATTR_NS | \TT_S1_ATTR_AP_RW_PL1 | \TT_S1_ATTR_SH_INNER | \TT_S1_ATTR_AF | \TT_S1_ATTR_nG)ldr x2, =0xF0A00000 // 目標虛擬地址ubfx x3, x2, #21, #9 // 提取 L2 索引str x1, [x22, x3, lsl #3] // 寫入 L2 頁表/*0x00000000 ~ 0xc0000000 ----l10xc0000000 ~ 0xe0000000 ----l20xe0000000 ~ 0xf0000000 ----l20xf0800000 ~ 0xf0870000 rne_mem ----l20xf0a00000 ~ 0xf0bfffff rne_cfg ----l20xf0000000 ~ 0xf02fffff rsv0xf0314000 ~ 0xf03effff peri -----0xf0200000 ~ 0xf03fffff : l2 -> l3 3_10xf0400000 ~ 0xf04fffff usb -----0xf0500000 ~ 0xf0517fff peri -----0xf0400000 ~ 0xf05fffff : l2 -> l3 3_20xf0600000 ~ 0xf062ffff ddr gic noc acodec -----0xf0600000 ~ 0xf07fffff : l2 -> l3 3_3地址轉換:L2 索引:ubfx 提取位[29:21] (#21, #9)L3 索引:ubfx 提取位[20:12] (#12, #9)頁表項位置:基址 + 索引 × 8 (lsl #3)*/// 設置 L2 頁表項:F0200000-F03FFFFF 指向 L3 頁表 (x23)// level 2 table: F020 0000 - F03F FFFF, 1 entry, point to level 3_1orr x1, x23, #TT_S1_ATTR_TABLE // 組合 L3 基址和表描述符屬性ldr x2, =0xF0200000 // 虛擬地址范圍起始ubfx x3, x2, #21, #9 // 提取 L2 索引str x1, [x22, x3, lsl #3] // 寫入 L2 頁表// 設置 L2 頁表項:F0400000-F05FFFFF 指向 L3 頁表 (x24)// level 2 table: F040 0000 - F05F FFFF, 1 entry, point to level 3_2orr x1, x24, #TT_S1_ATTR_TABLE // 組合 L3 基址和表描述符屬性ldr x2, =0xF0400000 // 虛擬地址范圍起始ubfx x3, x2, #21, #9 // 提取 L2 索引str x1, [x22, x3, lsl #3] // 寫入 L2 頁表// 設置 L2 頁表項:F0600000-F12A5FFF 指向 L3 頁表 (x25)// level 2 table: F060 0000 - F12A 5FFF, 1 entry, point to level 3_3orr x1, x25, #TT_S1_ATTR_TABLE // 組合 L3 基址和表描述符屬性ldr x2, =0xF0600000 // 虛擬地址范圍起始ubfx x3, x2, #21, #9 // 提取 L2 索引str x1, [x22, x3, lsl #3] // 寫入 L2 頁表// 填充 L3 頁表 (x23):F0200000-F03FFFFF 區域 (512 個 4KB 頁)// level 3 table: F02 0000 - F03F FFFF, 512 entry, x24// valid addr F020 0000 - F03F FFFFldr x1, =0x1000 // 頁大小:4KBldr x2, =((0xF03FFFFF + 1 - 0xF0200000) >> 12) // 計算頁數ldr x3, =0xF0200000 // 物理地址起始// 頁描述符屬性// 設備內存屬性ldr x4, = (TT_S1_ATTR_PAGE | \(2 << TT_S1_ATTR_MATTR_LSB) | \TT_S1_ATTR_NS | \TT_S1_ATTR_AP_RW_PL1 | \TT_S1_ATTR_SH_INNER | \TT_S1_ATTR_AF | \TT_S1_ATTR_nG)
loop3_1:ubfx x5, x3, #12, #9 // 提取頁內索引 (位[20:12])orr x6, x3, x4 // 組合物理地址和屬性str x6, [x23, x5, lsl #3] // 存儲到 L3 頁表 (x23)add x3, x3, x1 // 移動到下一頁subs x2, x2, #1 // 遞減頁計數器bne loop3_1 // 循環直到所有頁映射完成// 填充 L3 頁表 (x24):F0400000-F05FFFFF 區域 (512 個 4KB 頁)// level 3 table: F040 0000 - F05F FFFF,, 512 entry, x25// valid addr F040 0000 - F05F FFFFldr x1, =0x1000 // 頁大小:4KBldr x2, =((0xF05FFFFF + 1 - 0xF0400000) >> 12) // 計算頁數ldr x3, =0xF0400000 // 物理地址起始// 設備內存屬性ldr x4, = (TT_S1_ATTR_PAGE | \(2 << TT_S1_ATTR_MATTR_LSB) | \TT_S1_ATTR_NS | \TT_S1_ATTR_AP_RW_PL1 | \TT_S1_ATTR_SH_INNER | \TT_S1_ATTR_AF | \TT_S1_ATTR_nG)
loop3_2:ubfx x5, x3, #12, #9 // 提取頁內索引orr x6, x3, x4 // 組合物理地址和屬性str x6, [x24, x5, lsl #3] // 存儲到 L3 頁表 (x24)add x3, x3, x1 // 下一頁subs x2, x2, #1 // 遞減頁計數器bne loop3_2 // 循環// 填充 L3 頁表 (x25):F0600000-F07FFFFF 區域 (512 個 4KB 頁)// level 3 table: F060 0000 - F07F FFFF, 512 entry, x25// valid addr F060 0000 - F07F FFFFldr x1, =0x1000 // 頁大小:4KBldr x2, =((0xF07FFFFF + 1 - 0xF0600000) >> 12) // 計算頁數ldr x3, =0xF0600000 // 物理地址起始// 設備內存屬性ldr x4, = (TT_S1_ATTR_PAGE | \(2 << TT_S1_ATTR_MATTR_LSB) | \TT_S1_ATTR_NS | \TT_S1_ATTR_AP_RW_PL1 | \TT_S1_ATTR_SH_INNER | \TT_S1_ATTR_AF | \TT_S1_ATTR_nG)
loop3_3:ubfx x5, x3, #12, #9 // 提取頁內索引orr x6, x3, x4 // 組合物理地址和屬性str x6, [x25, x5, lsl #3] // 存儲到 L3 頁表 (x25)add x3, x3, x1 // 下一頁subs x2, x2, #1 // 遞減頁計數器bne loop3_3 // 循環ret.cfi_endproc